;  Call:  var1[1:0] = dividend (0x0000..0xffff)
;         var2[1:0] = divisor (0x0001..0x7fff)
;         mod[1:0]  = don't care
;         lc        = don't care (high register must be allocated)
;
;  Result:var1[1:0] = var1[1:0] / var2[1:0]
;         var2[1:0] = not changed
;         mod[1:0]  = var1[1:0] % var2[1:0]
;         lc        = 0
;
; Size  = 16 words
; Clock = 179..211 cycles (+ret)
; Stack = 0 byte


div16u:		
		clr	mod0
		clr	mod1
		ldi	lc,16	
		lsl	var10
		rol	var11
		rol	mod0
		rol	mod1
		cp	mod0,var20
		cpc	mod1,var21
		brcs	PC+4
		inc	var10
		sub	mod0,var20
		sbc	mod1,var21
		dec	lc
		brne	PC-11
		ret