;  Call:  var1[2:0] = dividend (0x000000..0xffffff)
;         var2[2:0] = divisor (0x000001..0x7fffff)
;         mod[2:0]  = don't care
;         lc        = don't care (high register must be allocated)
;
;  Result:var1[2:0] = var1[2:0] / var2[2:0]
;         var2[2:0] = not changed
;         mod[2:0]  = var1[2:0] % var2[2:0]
;         lc        = 0
;
; Size  = 21 words
; Clock = 348..412 cycles (+ret)
; Stack = 0 bytes


div24u:		
		clr	mod0
		clr	mod1
		clr	mod2
		ldi	lc,24	
		lsl	var10
		rol	var11
		rol	var12
		rol	mod0
		rol	mod1
		rol	mod2
		cp	mod0,var20
		cpc	mod1,var21
		cpc	mod2,var22
		brcs	PC+5
		inc	var10
		sub	mod0,var20
		sbc	mod1,var21
		sbc	mod2,var22
		dec	lc
		brne	PC-15
		ret