;  Call:  var1[3:0] = dividend (0x00000000..0xffffffff)
;         var2[3:0]  = divisor (0x00000001..0x7fffffff)
;         mod[3:0]  = don't care
;         lc            = don't care 
;                        (high register must be allocated)
;  Result:var1[3:0] = var1[3:0] / var2[3:0]
;         var2[3:0]   = not changed
;         mod[3:0]    = var1[3:0] % var2[3:0]
;                      lc = 0
; Size  = 26 words
; Clock = 549..677 cycles (+ret)
; Stack = 0 bytes


div32u:		
		clr	mod0
		clr	mod1
		clr	mod2
		clr	mod3
		ldi	lc,32
		lsl	var10
		rol	var11
		rol	var12
		rol	var13
		rol	mod0
		rol	mod1
		rol	mod2
		rol	mod3
		cp	mod0,var20
		cpc	mod1,var21
		cpc	mod2,var22
		cpc	mod3,var23
		brcs	PC+6
		inc	var10
		sub	mod0,var20
		sbc	mod1,var21
		sbc	mod2,var22
		sbc	mod3,var23
		dec	lc
		brne	PC-19
		ret